1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of manufacturing the same, and more particularly to a semiconductor memory device having a stacked capacitor and a manufacturing method the same.
2. Description of the Related Art
A Dynamic Random-Access Memory (DRAM) is known as a typical semiconductor memory device which is highly integrated. The DRAM includes memory cells, etc., each of which is composed of one switching transistor and one capacitor.
The reason why each memory cell is thus structured is because a chip area of each memory cell can be easily reduced. In general, a MOSFET (Metal-oxide-Semiconductor Field-Effect Transistor) is employed as the switching transistor.
In order to stably operate a DRAM, it is required that the capacity of the capacitor in each memory cell is made large. However, if the chip area of each memory cell is reduced, the capacity of the capacitor becomes small, therefore, the stable operation of the DRAM is not secured. In order to expand the capacity of the capacitor while reducing the chip area of each memory cell, improved structures of the memory cell have been developed and proposed.
Unexamined Japanese Patent Application KOKAI Publication No. H5-218332 discloses a memory cell in which a storage electrode (charge storage electrode) is formed in a cylindrical shape. In such a memory cell, when forming the storage electrode, an interlayer insulating film needs to be prevented from being etched. Thus, an etching stopper formed of a silicon nitride film, etc., is formed as to cover the entire area between the adjacent storage electrodes on the interlayer insulating film.
U.S. Pat. No. 5,580,812 discloses a memory cell, in which a charge storage electrode is formed in a cylindrical shape, and a silicon nitride film is so formed on an interlayer insulating film as to cover the entire area between adjacent charge storage electrodes. The aforementioned patent application is hereby incorporated herein by reference in its entirety.
In the memory cell disclosed both in Unexamined Japanese Patent Application KOKAI Publication No. H5-218332 and U.S. Pat. No. 5,580,812, the silicon nitride film covers the entire area between the adjacent charge storage electrodes. This entails a problem that a crack is likely to occur in the silicon nitride film. The crack may occur, since the silicon nitride film is heated up and cool down in various heat processes which are carried out after the formation of the capacitor, thereby thermal expansion and thermal shrinkage of the silicon nitride film are repeated. Once the crack occurs in the silicon nitride film, insulation performance of the memory cell fall off. Such crack may occur not only in the area between the adjacent charge storage electrodes, but also in an area away from the memory cell array.
The silicon nitride film covers the entire area between the adjacent charge storage electrodes. This interrupts a hydrogen atom being added into the interlayer insulating film or the semiconductor substrate, in a hydrogen anneal process carried out after the formation of the memory cell. If the hydrogen atom is thus not added into the interlayer insulating film or the semiconductor substrate, a hydrogen anneal process for improving an interface state caused by an etching process can not be performed. As a result of such an interface state, a threshold voltage value of a MOSFET for switching may vary, and a leak current may increase. Thus, information storage characteristics of the memory cells are deteriorated.
Furthermore, in the memory cell disclosed both in Unexamined Japanese Patent Application KOKAI Publication No. H5-218332 and U.S. Pat. No. 5,580,812, a leaf-like projection is likely to remain on the charge storage electrodes having a circular cylindrical shape. Unexamined Japanese Patent Application KOKAI Publication No. H9-232539 discloses a method of manufacturing a semiconductor memory device, while removing a leaf-like projection in an oxidation process in which the projection is oxidized and etched using hydrofluoric acid. However, this method causes a complicated manufacturing process of the semiconductor memory device.
A method for manufacturing a semiconductor memory device without using a silicon nitride film as an etching stopper has been proposed.
For example, Unexamined Japanese Patent Application KOKAI Publication No. H6-196649 discloses a method of manufacturing a semiconductor memory device, in which impurities are added into a silicon oxidation film for forming electrodes, and an etching process is performed using vapor phase hydrofluoric acid while using the silicon oxidation film on an interlayer insulating film as an etching stopper, thereby selectively removing only the silicon oxidation film for forming electrodes.
Unexamined Japanese Patent Application KOKAI Publication No. H10-22473 discloses a method of manufacturing a semiconductor memory device, in which a difference in density between two silicon oxidation films is made and a silicon oxidation film having low density is selectively removed.
The methods cause a complicated manufacturing process of the semiconductor memory device as well.
Accordingly, the present invention has been made in consideration of the above, and an object thereof is to provide a method of manufacturing a semiconductor memory device, in which performance of memory cells is prevented from being deteriorated, and a semiconductor memory device manufactured by this method.
Another object of the present invention is to provide a semiconductor memory device, in which a crack is prevented from occurring in an insulating film having a function as an etching stopper without interrupting a hydrogen anneal process which is carried out after the formation of a memory cell, and a semiconductor memory device manufactured by this method.
In order to achieve the above-described objects, according to the first aspect of the present invention, there is provided a semiconductor memory device comprising:
a semiconductor substrate;
an interlayer insulating film which is formed on the semiconductor substrate;
a plurality of charge storage electrodes which are formed on the interlayer insulating film;
a plurality of insulating members which are formed and separated from each other on the interlayer insulating film, so as to surround periphery of the plurality of charge storage electrodes;
a capacitance insulating film which is so formed as to cover the plurality of charge storage electrodes and the insulating members; and
a plate electrode which is formed on the capacitance insulating film.
In the semiconductor memory device of the present invention, the plurality of insulating members are formed and separated on the interlayer insulating film as to cover the periphery of the respective charge storage electrodes, without covering the entire area between the adjacent charge storage electrodes. Even if the insulating members are heated up and cool down in various heat processes carried out after the formation of the capacitor, a stress caused by thermal expansion and thermal shrinkage of the insulating members and applied thereto is small. Accordingly, a crack is not likely to occur in the insulating members.
Each of the insulating members does not cover the entire area between the adjacent charge storage electrodes, therefore, a hydrogen anneal process for adding a hydrogen atom into the interlayer insulating film or the semiconductor substrate is preferably performed without being obstructed by the presence of the insulating member. Changes in a threshold voltage value of a MOSFET for switching and an increase in a leak current can be controlled. As a result of this, information storage characteristics of the memory cell can be improved, periodic refresh operations can be processed at long intervals.
As explained above, the insulating members are so formed as to surround the periphery of the respective charge storage electrodes. Thus, even if the position of a contact hole prepared for connecting a switching transistor deviates from the position of the corresponding charge storage electrode, the contact hole is not exposed as long as it stays within an area covered by the insulating member. Thus, the center of the contact holes does not have to strictly correspond to the center of the charge storage electrode.
If the upper surface of each charge storage electrode is concaved, the surface area thereof increases. Specifically, in a case where the charge storage electrodes have the bottom and are formed in a cylindrical shape, the surface area thereof increases. In such a case, the capacity of the capacitor can be increased without increasing the chip area.
It is preferred that a silicon dioxide film is used as the interlayer insulating film, while a silicon nitride film is used as the insulating film. In this case, a desired etching selective ratio (a difference between etching rates) of the silicon nitride film with respect to the silicon dioxide film can be easily obtained.
According to the second aspect of the present invention, there is provided a method of manufacturing a semiconductor memory device, comprising:
forming a first insulating film on an interlayer insulating film which is formed on a semiconductor substrate;
forming a second insulating film on the first insulating film;
forming a plurality of openings in the first and second insulating films;
forming a plurality of charge storage electrodes on the interlayer insulating film by arranging an electric conductor in each of the openings;
forming a plurality of sidewalls surrounding the charge storage electrodes on the first insulating film, by removing the second insulating film;
etching the first insulating film using the sidewalls as an etching mask, and removing the first insulating film except under each of the sidewalls, so as to form, on the interlayer insulating film, a plurality of insulating members which surround periphery of the charge storage electrodes and which are separated from each other;
removing each of the sidewalls;
forming a capacitance insulating film which covers the charge storage electrodes and the insulating members; and
forming a plate electrode on the capacitance insulating film.
In the method of manufacturing the semiconductor memory device of the present invention, the first and second insulating films are formed on the interlayer insulating film, thereafter forming the charge storage electrodes respectively in the plurality of openings formed in the first and second insulating films. Then, the second insulating film is removed therefrom, and the plurality of sidewalls surrounding the charge storage electrodes are formed on the first insulating film. Furthermore, the first insulating film is etched while using the sidewalls as etching masks. Then, the plurality of insulating members which surround the periphery of the charge storage electrodes and which are separated from each other are formed. In this manufacturing method, the first insulating film has a function as an etching stopper protecting the interlayer insulating film. After the sidewalls are removed, the capacitance insulating film covering the charge storage electrodes and the insulating members is formed. The plate electrode is formed on the capacitance insulating film, whereby the semiconductor memory device is manufactured.
The electric conductor is formed, for example, in the openings and the second insulating film, and etched back until the surface of the second insulating film is exposed, so that the charge storage electrodes are formed. In this case, the electric conductor does not remain on the surface of the second insulating film.
The electric conductor is so arranged along inner walls of the openings, and upper surfaces of the plurality of charge storage electrodes are concaved. In such a case, the charge storage electrodes are formed in a cylindrical shape having bottom, resulting in an increase in the capacity of the capacitor.
After forming the interlayer insulating film, if a heat process for heating the interlayer insulating film in order to shape the film is performed, an etching rate of the interlayer insulating film can be lowered. Thus, the interlayer insulating film is not likely to be etched in a process for removing the sidewalls.
It is preferred that a silicon dioxide film is used as the interlayer insulating film, while a silicon nitride film is used as the first insulating film. In this case, a desired etching selective ratio (a difference between etching rates) of the silicon nitride film with respect to the silicon dioxide film can be easily obtained.